53302 search results - page 20 / 10661 » On the design of a |
MEMOCODE
2007
IEEE
14 years 2 months ago
2007
IEEE
—With the arrival of nanometer technologies wire delays are no longer negligible with respect to gate delays, and timing-closure becomes a major challenge to System-on-Chip desig...
ISCAS
1999
IEEE
14 years 16 hour ago
1999
IEEE
High-level power design presents a complex, multiobjective problem that involves the simultaneous optimisation of competing criteria such as speed, area and power. It is difficult...
CSCW
1998
ACM
13 years 12 months ago
1998
ACM
Users of synchronous groupware systems act both as individuals and as members of a group, and designers must try to support both roles. However, the requirements of individuals an...
WICSA
2008
13 years 9 months ago
2008
This paper introduces an architectural style for enabling end-users to quickly design and deploy software systems in domains characterized by highly personalized and dynamic requi...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
In a later stage of a VLSI design, it is quite often to modify a design implementation to accommodate the new specification, design errors, or to meet design constraints. In addit...