415 search results - page 39 / 83 » On the energy-efficiency of speculative hardware |
IWMM
2010
Springer
14 years 1 months ago
2010
Springer
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...
ICS
2001
Tsinghua U.
14 years 1 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
ISCA
2002
IEEE
13 years 8 months ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
IEEEPACT
2007
IEEE
14 years 3 months ago
2007
IEEE
In recent years, microprocessor manufacturers have shifted their focus from single-core to multi-core processors. To avoid burdening programmers with the responsibility of paralle...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...