184 search results - page 9 / 37 » On the power of hardware transactional memory to simplify me... |
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the time...
ASPLOS
2012
ACM
12 years 3 months ago
2012
ACM
Multithreaded programs often suffer from synchronization bugs such as atomicity violations and deadlocks. These bugs arise from complicated locking strategies and ad hoc synchroni...
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Scratchpad memory (SPM), a fast software-managed onchip SRAM, is now widely used in modern embedded processors. Compared to hardware-managed cache, it is more efficient in perfor...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Dynamic Random Access Memory (DRAM) is used as the bulk of the main memory in most computing systems and its energy and power consumption has become a first-class design considera...
ISLPED
2009
ACM
14 years 2 months ago
2009
ACM
With the popularity of multi-core architecture, to sustain the memory demands from different cores, the memory system is expected to grow significantly in both speed and capacit...