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» On the testability of SDL specifications
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VTS
1996
IEEE
111views Hardware» more  VTS 1996»
13 years 11 months ago
Synthesis-for-scan and scan chain ordering
Designing a testable circuit is often a two step process. First, the circuit is designed to conform to the functional specifications. Then, the testability aspects are added. By t...
Robert B. Norwood, Edward J. McCluskey
ASPDAC
1995
ACM
108views Hardware» more  ASPDAC 1995»
13 years 11 months ago
Synthesis-for-testability using transformations
- We address the problem of transforming a behavioral specification so that synthesis of a testable implementation from the new specification requires significantly less area and ...
Miodrag Potkonjak, Sujit Dey, Rabindra K. Roy
JSW
2007
107views more  JSW 2007»
13 years 7 months ago
Reducing Domain Level Scenarios to Test Component-based Software
—Higher-order black box software tests against independent end user domain requirements has become an issue of increasing importance with compositional reuse of software artifact...
Oliver Skroch, Klaus Turowski
CCS
2009
ACM
13 years 11 months ago
On voting machine design for verification and testability
We present an approach for the design and analysis of an electronic voting machine based on a novel combination of formal verification and systematic testing. The system was desig...
Cynthia Sturton, Susmit Jha, Sanjit A. Seshia, Dav...
DAC
1994
ACM
13 years 11 months ago
Optimizing Resource Utilization and Testability Using Hot Potato Techniques
This paper introduces hot potato high level synthesis transformation techniques. These techniques add deflection operations in a computation in such a way that a specific goal is ...
Miodrag Potkonjak, Sujit Dey