Sciweavers

464 search results - page 26 / 93
» On the three-dimensional channel routing
Sort
View
DAC
1995
ACM
14 years 2 months ago
New Performance-Driven FPGA Routing Algorithms
—Motivated by the goal of increasing the performance of FPGA-based designs, we propose new Steiner and arborescence FPGA routing algorithms. Our Steiner tree constructions signiï...
Michael J. Alexander, Gabriel Robins
COMCOM
1998
102views more  COMCOM 1998»
13 years 10 months ago
Preferred link based delay-constrained least-cost routing in wide area networks
Multimedia applications involving digital audio and/or digital video transmissions require strict QoS constraints (end-to-end delay bound, bandwidth availability, packet loss rate...
R. Sriram, Govindarasu Manimaran, C. Siva Ram Murt...
ISCAS
2007
IEEE
128views Hardware» more  ISCAS 2007»
14 years 5 months ago
Collaborative Routing Architecture for FPGA
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efï¬ciency in hardware and competitive delay p...
Yaling Ma, Mingjie Lin
TCOM
2010
116views more  TCOM 2010»
13 years 9 months ago
Optimal Routing for Decode-Forward in Cooperative Wireless Networks
Abstract—We investigate routing in cooperative multipleterminal wireless networks in which the nodes can collaborate with each other in data transmission. First, we motivate coop...
Lawrence Ong, Mehul Motani
VLSID
2002
IEEE
120views VLSI» more  VLSID 2002»
14 years 11 months ago
Floorplan Evaluation with Timing-Driven Global Wireplanning, Pin Assignment and Buffer/Wire Sizing
We describe a new algorithm for floorplan evaluation using timing-driven buffered routing according to a prescribed buffer site map. Specifically, we describe a provably good mult...
Christoph Albrecht, Andrew B. Kahng, Ion I. Mandoi...