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» On the three-dimensional channel routing
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ICCAD
1996
IEEE
76views Hardware» more  ICCAD 1996»
14 years 2 months ago
Directional bias and non-uniformity in FPGA global routing architectures
This paper investigates the effect of the prefabricated routing track distribution on the area-efficiency of FPGAs. The first question we address is whether horizontal and vertica...
Vaughn Betz, Jonathan Rose
DAC
2000
ACM
14 years 10 months ago
An architecture-driven metric for simultaneous placement and global routing for FPGAs
FPGA routing resources typically consist of segments of various lengths. Due to the segmented routing architectures, the traditional measure of wiring cost (wirelength, delay, con...
Yao-Wen Chang, Yu-Tsang Chang
TPDS
1998
78views more  TPDS 1998»
13 years 9 months ago
Resource Deadlocks and Performance of Wormhole Multicast Routing Algorithms
—We show that deadlocks due to dependencies on consumption channels are a fundamental problem in wormhole multicast routing. This type of resource deadlocks has not been addresse...
Rajendra V. Boppana, Suresh Chalasani, C. S. Ragha...
ISCAS
2005
IEEE
104views Hardware» more  ISCAS 2005»
14 years 3 months ago
On the three-dimensional channel routing
— The 3-D channel routing is a fundamental problem on the physical design of 3-D integrated circuits. The 3-D channel is a 3-D grid G and the terminals are vertices of G located ...
Satoshi Tayu, Patrik Hurtig, Yoshiyasu Horikawa, S...
AHS
2006
IEEE
100views Hardware» more  AHS 2006»
14 years 3 months ago
Wormhole Routing with Virtual Channels using Adaptive Rate Control for Network-on-Chip (NoC)
This paper presents a new approach in realizing Virtual Channels tailored for Network on Chip implementations. The technique makes use of a flow control mechanism based on adaptiv...
Ioannis Nousias, Tughrul Arslan