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» On two-step routing for FPGAS
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ICCTA
2007
IEEE
13 years 10 months ago
Faster Placer for Island-Style FPGAs
In this paper, we propose a placement method for islandstyle FPGAs, based on fast yet very good initial placement followed by refinement using ultra-low temperature Simulated Anne...
Pritha Banerjee, Susmita Sur-Kolay
FPL
2008
Springer
125views Hardware» more  FPL 2008»
13 years 8 months ago
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks
FPGA devices have witnessed popularity in their use for the rapid prototyping of biological Spiking Neural Network (SNNs) applications, as they offer the key requirement of reconf...
Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dud...
FPGA
2008
ACM
142views FPGA» more  FPGA 2008»
13 years 8 months ago
Modeling routing demand for early-stage FPGA architecture development
Architecture development for FPGAs has typically been a very empirical discipline, requiring the synthesis of benchmark circuits into candidate architectures. This is difficult to...
Wei Mark Fang, Jonathan Rose
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
14 years 23 days ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
FPL
2005
Springer
96views Hardware» more  FPL 2005»
14 years 7 days ago
Dynamic Reconfiguration with hardwired Networks-on-Chip on future FPGAs
Due to their layered approach, Networks-on-Chip (NoC) are a promising communication backbone in the field of heterogeneous dynamically reconfigurable systems. In this paper a fu...
Ronald Hecht, Stephan Kubisch, Andreas Herrholtz, ...