Sciweavers

170 search results - page 8 / 34
» On two-step routing for FPGAS
Sort
View
FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
14 years 26 days ago
GlitchLess: an active glitch minimization technique for FPGAs
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
FCCM
2004
IEEE
107views VLSI» more  FCCM 2004»
13 years 10 months ago
An Alternate Wire Database for Xilinx FPGAs
This paper presents ADB, an Alternate Wire Database, suitable for routing, tracing, and browsing in Xilinx Virtex, Virtex-E, Virtex-II, and Virtex-II Pro FPGAs. While mainstream d...
Neil Steiner, Peter M. Athanas
FPGA
2012
ACM
300views FPGA» more  FPGA 2012»
12 years 2 months ago
Reducing the cost of floating-point mantissa alignment and normalization in FPGAs
In floating-point datapaths synthesized on FPGAs, the shifters that perform mantissa alignment and normalization consume a disproportionate number of LUTs. Shifters are implemente...
Yehdhih Ould Mohammed Moctar, Nithin George, Hadi ...
FPGA
2003
ACM
137views FPGA» more  FPGA 2003»
13 years 12 months ago
Customized regular channel design in FPGAs
FPGAs are one of the essential components in platform-based embedded systems. Such systems are customized and applied only to a limited set of applications. Also some applications...
Elaheh Bozorgzadeh, Majid Sarrafzadeh
SLIP
2006
ACM
14 years 20 days ago
The routability of multiprocessor network topologies in FPGAs
A fundamental difference between ASICs and FPGAs is that wires in ASICs are designed such that it matches the requirements of a particular design. Wire parameters such as: length...
Manuel Saldaña, Lesley Shannon, Paul Chow