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INTEGRATION
2008
183views more  INTEGRATION 2008»
13 years 7 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
CVPR
2012
IEEE
11 years 10 months ago
Hierarchical face parsing via deep learning
This paper investigates how to parse (segment) facial components from face images which may be partially occluded. We propose a novel face parser, which recasts segmentation of fa...
Ping Luo, Xiaogang Wang, Xiaoou Tang
ISQED
2010
IEEE
227views Hardware» more  ISQED 2010»
14 years 2 months ago
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's components, clock distribution network power accounts for a large portion of chip po...
Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, ...
HYBRID
2004
Springer
14 years 1 months ago
Network Congestion Alleviation Using Adjoint Hybrid Control: Application to Highways
Abstract. This paper derives an optimization-based control methodology for networks of switched and hybrid systems in which each mode is governed by a partial differential equatio...
Alexandre M. Bayen, Robin L. Raffard, Claire Tomli...
CMSB
2006
Springer
13 years 11 months ago
Incorporating Time Delays into the Logical Analysis of Gene Regulatory Networks
Based on the logical description of gene regulatory networks developed by R. Thomas, we introduce an enhanced modelling approach that uses timed automata. It yields a refined quali...
Heike Siebert, Alexander Bockmayr