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DAC
2008
ACM
14 years 8 months ago
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-...
NETWORKS
2002
13 years 7 months ago
Approximation algorithms for constructing wavelength routing networks
Consider a requirement graph whose vertices represent customers and an edge represents the need to route a unit of flow between its end vertices along a single path. All of these ...
Refael Hassin, Asaf Levin
FPGA
2009
ACM
180views FPGA» more  FPGA 2009»
14 years 2 months ago
Scalable don't-care-based logic optimization and resynthesis
We describe an optimization method for combinational and sequential logic networks, with emphasis on scalability and the scope of optimization. The proposed resynthesis (a) is cap...
Alan Mishchenko, Robert K. Brayton, Jie-Hong Rolan...
CEC
2003
IEEE
14 years 1 months ago
Stochastic neural network models for gene regulatory networks
AbstractRecent advances in gene-expression profiling technologies provide large amounts of gene expression data. This raises the possibility for a functional understanding of geno...
Tianhai Tian, Kevin Burrage
ISMIR
2003
Springer
196views Music» more  ISMIR 2003»
14 years 27 days ago
Automatic segmentation, learning and retrieval of melodies using a self-organizing neural network
We introduce a neural network, known as SONNETMAP, capable of automatic segmentation, learning and retrieval of melodies. SONNET-MAP is a synthesis of the SONNET (Self-Organizing ...
S. Harford