Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
Consider a requirement graph whose vertices represent customers and an edge represents the need to route a unit of flow between its end vertices along a single path. All of these ...
We describe an optimization method for combinational and sequential logic networks, with emphasis on scalability and the scope of optimization. The proposed resynthesis (a) is cap...
Alan Mishchenko, Robert K. Brayton, Jie-Hong Rolan...
AbstractRecent advances in gene-expression profiling technologies provide large amounts of gene expression data. This raises the possibility for a functional understanding of geno...
We introduce a neural network, known as SONNETMAP, capable of automatic segmentation, learning and retrieval of melodies. SONNET-MAP is a synthesis of the SONNET (Self-Organizing ...