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DAC
2003
ACM
14 years 8 months ago
On-chip logic minimization
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
Roman L. Lysecky, Frank Vahid
ICPIA
1992
13 years 11 months ago
Intelligent Pattern Recognition and Applications
:: This talk deals with fundamental aspects of Intelligent Pattern Recognition (IPR) and applications. It basically includes the following: Overview of 3D Biometric Technology and ...
Patrick Shen-Pei Wang
DAC
2001
ACM
14 years 8 months ago
Latency-Driven Design of Multi-Purpose Systems-On-Chip
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
Seapahn Meguerdichian, Milenko Drinic, Darko Kirov...
CHI
2007
ACM
14 years 8 months ago
Social dynamics of early stage co-design in developing regions
Technology arguably has the potential to play a key role in improving the lives of people in developing regions. However, these communities are not well understood and designers m...
Divya Ramachandran, Matthew Kam, Jane Chiu, John F...
DDECS
2008
IEEE
185views Hardware» more  DDECS 2008»
14 years 2 months ago
Fast Boolean Minimizer for Completely Specified Functions
: We propose a simple and fast two-level minimization algorithm for completely specified functions in this paper. The algorithm is based on processing ternary trees. A ternary tree...
Petr Fiser, Pemysl Rucký, Irena Vanov&aacut...