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FORTE
2008
13 years 9 months ago
Distributed Semantics and Implementation for Systems with Interaction and Priority
The paper studies a distributed implementation method for the BIP (Behavior, Interaction, Priority) component framework for modeling heterogeneous systems. BIP offers two powerful ...
Ananda Basu, Philippe Bidinger, Marius Bozga, Jose...
HPCA
2005
IEEE
14 years 7 months ago
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
Dhruba Chandra, Fei Guo, Seongbeom Kim, Yan Solihi...
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 1 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
ICS
2003
Tsinghua U.
14 years 19 days ago
Inferential queueing and speculative push for reducing critical communication latencies
Communication latencies within critical sections constitute a major bottleneck in some classes of emerging parallel workloads. In this paper, we argue for the use of Inferentially...
Ravi Rajwar, Alain Kägi, James R. Goodman
FOCM
2011
188views more  FOCM 2011»
12 years 11 months ago
Compressive Wave Computation
This paper considers large-scale simulations of wave propagation phenomena. We argue that it is possible to accurately compute a wavefield by decomposing it onto a largely incomp...
Laurent Demanet, Gabriel Peyré