In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges i...
The verification of an execution against memory consistency is known to be NP-hard. This paper proposes a novel fast memory consistency verification method by identifying a new na...
Yunji Chen, Yi Lv, Weiwu Hu, Tianshi Chen, Haihua ...
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...
Mouna Baklouti, Mohamed Abid, Philippe Marquet, Je...
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
Abstract—Ballooning traffic volumes and increasing linkspeeds require ever high compute power to perform complex real-time processing of network packets. FPGAs have already been...