154 search results - page 7 / 31 » Operating-system directed power reduction |
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
OSDI
2002
ACM
14 years 7 months ago
2002
ACM
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
We present PowerDial, a system for dynamically adapting application behavior to execute successfully in the face of load and power fluctuations. PowerDial transforms static conï¬...
GLVLSI
2009
IEEE
13 years 11 months ago
2009
IEEE
Modern embedded devices (e.g., PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems include multi...
SOSP
1997
ACM
13 years 8 months ago
1997
ACM
Abstract: Transactions and recoverable memories are powerful mechanisms for handling failures and manipulating persistent data. Unfortunately, standard recoverable memories incur a...