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ICCAD
1994
IEEE
119views Hardware» more  ICCAD 1994»
13 years 11 months ago
Multi-level network optimization for low power
This paper describes a procedure for minimizing the power consumption in a boolean network under the zero delay model. Power is minimized by modifying the function of each interme...
Sasan Iman, Massoud Pedram
CODES
2004
IEEE
13 years 11 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
IJCNN
2006
IEEE
14 years 1 months ago
A Columnar Competitive Model with Simulated Annealing for Solving Combinatorial Optimization Problems
— One of the major drawbacks of the Hopfield network is that when it is applied to certain polytopes of combinatorial problems, such as the traveling salesman problem (TSP), the...
Eu Jin Teoh, Huajin Tang, Kay Chen Tan
BMCBI
2006
239views more  BMCBI 2006»
13 years 7 months ago
Applying dynamic Bayesian networks to perturbed gene expression data
Background: A central goal of molecular biology is to understand the regulatory mechanisms of gene transcription and protein synthesis. Because of their solid basis in statistics,...
Norbert Dojer, Anna Gambin, Andrzej Mizera, Bartek...
BMCBI
2008
153views more  BMCBI 2008»
13 years 7 months ago
Estimating the size of the solution space of metabolic networks
Background: Cellular metabolism is one of the most investigated system of biological interactions. While the topological nature of individual reactions and pathways in the network...
Alfredo Braunstein, Roberto Mulet, Andrea Pagnani