261 search results - page 16 / 53 » Optimal Hardware Pattern Generation for Functional BIST |
VLSISP
2008
13 years 8 months ago
2008
In this paper we describe a regular expression pattern matching approach for reconfigurable hardware. Following a Non-deterministic Finite Automata direction, we introduce three ne...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
Failure analysis (FA) and diagnosis of memory cores plays a key role in system-on-chip (SOC) product development and yield ramp-up. Conventional FA based on bitmaps and the experi...
CASES
2000
ACM
14 years 1 months ago
2000
ACM
In this paper, we describe a software architecture supporting code generation from within Ptolemy II. Ptolemy II is a componentbased design tool intended for embedded and real-tim...
ISQED
2011
IEEE
13 years 12 days ago
2011
IEEE
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
ATS
2003
IEEE
14 years 2 months ago
2003
IEEE
Recent probabilistic test generation approaches have proven that detecting single stuck-at faults multiple times is effective at reducing the defective part level (DPL). Unfortuna...