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» Optimal Hardware Pattern Generation for Functional BIST
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MICRO
2002
IEEE
124views Hardware» more  MICRO 2002»
14 years 1 months ago
Optimizing pipelines for power and performance
During the concept phase and definition of next generation high-end processors, power and performance will need to be weighted appropriately to deliver competitive cost/performan...
Viji Srinivasan, David Brooks, Michael Gschwind, P...
ISCA
2002
IEEE
102views Hardware» more  ISCA 2002»
14 years 1 months ago
Implementing Optimizations at Decode Time
The number of pipeline stages separating dynamic instruction scheduling from instruction execution has increased considerably in recent out-of-order microprocessor implementations...
Ilhyun Kim, Mikko H. Lipasti
ICCAD
2008
IEEE
127views Hardware» more  ICCAD 2008»
14 years 5 months ago
Design and optimization of a digital microfluidic biochip for protein crystallization
Proteins crystallization is a commonly used technique for protein analysis and subsequent drug design. It predicts the three-dimensional arrangement of the constituent amino acids...
Tao Xu, Krishnendu Chakrabarty, Vamsee K. Pamula
IJCNN
2006
IEEE
14 years 2 months ago
Online Training of a Generalized Neuron with Particle Swarm Optimization
— Neural networks are used in a wide number of fields including signal and image processing, modeling and control and pattern recognition. Some of the most common type of neural ...
Raveesh Kiran, Sandhya R. Jetti, Ganesh K. Venayag...
EUROMICRO
2000
IEEE
14 years 1 months ago
A Simulink(c)-Based Approach to System Level Design and Architecture Selection
We propose a design flow for low-power and low-cost, data-dominated, embedded systems which tightly integrate different technologies and architectures. We use Mathworks’ Simuli...
Luciano Lavagno, Begoña Pino, Leonardo Mari...