261 search results - page 40 / 53 » Optimal Hardware Pattern Generation for Functional BIST |
ICFP
2002
ACM
14 years 7 months ago
2002
ACM
We have added a Java virtual machine (henceforth JVM) bytecode generator to the optimizing Scheme-to-C compiler Bigloo. We named this new compiler BiglooJVM. We have used this new...
IJON
2011
12 years 11 months ago
2011
, Yunde Jia Model structure selection is currently an open problem in modeling data via Gaussian Mixture Models (GMM). This paper proposes a discriminative method to select GMM st...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract— This paper discusses the generation of informationrich, arbitrarily-large synthetic data sets which can be used to (a) efficiently learn tests that correlate a set of ...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
A high-level test synthesis (HLTS) method targeted for delay fault testability is presented. The proposed method, when combined with hierarchical test pattern generation for embed...
ASAP
2008
IEEE
13 years 9 months ago
2008
IEEE
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...