261 search results - page 47 / 53 » Optimal Hardware Pattern Generation for Functional BIST |
FPGA
2008
ACM
13 years 9 months ago
2008
ACM
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Shallow trench isolation (STI) is the mainstream CMOS isolation technology. It uses chemical mechanical planarization (CMP) to remove excess of deposited oxide and attain a planar...
ISLPED
2003
ACM
14 years 23 days ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
CISIS
2007
IEEE
14 years 1 months ago
2007
IEEE
: The availability of enormous amounts of un-used computing power and data storage over the In-ternet makes the development of a globally distributed computing platform, called Ove...
JAIR
2006
13 years 7 months ago
2006
We characterize the search landscape of random instances of the job shop scheduling problem (JSP). Specifically, we investigate how the expected values of (1) backbone size, (2) d...