452 search results - page 16 / 91 » Optimal Message-Passing for Data Coherency in Distributed Ar... |
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
WWW
2007
ACM
14 years 8 months ago
2007
ACM
Continuous queries are used to monitor changes to time varying data and to provide results useful for online decision making. Typically a user desires to obtain the value of some ...
SIGCOMM
2010
ACM
13 years 7 months ago
2010
ACM
We revisit the device-driver architecture supported by the majority of operating systems, where a driver is a passive object that does not have its own thread of control and is on...
CCGRID
2006
IEEE
14 years 1 months ago
2006
IEEE
A problem with running distributed shared memory applications in heterogeneous environments is that making optimal use of available resources often requires significant changes t...