This paper addresses the problem of optimizing the packet transmission schedule in an ad hoc network with end-toend delay constraints. The emphasis is to determine the proper rela...
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
This paper presents a random finite set theoretic formulation for multi-object tracking as perceived by a 3D-LIDAR in a dynamic environment. It is mainly concerned with the joint...
Kwang Wee Lee, Bharath Kalyan, W. Sardha Wijesoma,...
The multilevel placement package mPL6 combines improved implementations of the global placer mPL5 (ISPD05) and the XDP legalizer and detailed placer (ASPDAC06). It consistently pr...
Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kent...
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...