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ICCAD
2003
IEEE
141views Hardware» more  ICCAD 2003»
15 years 8 months ago
An Enhanced Multilevel Algorithm for Circuit Placement
This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation...
Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shin...
127
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DAC
2005
ACM
16 years 4 months ago
Physically-aware HW-SW partitioning for reconfigurable architectures with partial dynamic reconfiguration
Many reconfigurable architectures offer partial dynamic configurability, but current system-level tools cannot guarantee feasible implementations when exploiting this feature. We ...
Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. D...
COMCOM
2006
96views more  COMCOM 2006»
15 years 3 months ago
Dynamic cache reconfiguration strategies for cluster-based streaming proxy
The high bandwidth and the relatively long-lived characteristics of digital video are key limiting factors in the wide-spread usage of streaming content over the Internet. The pro...
Yang Guo, Zihui Ge, Bhuvan Urgaonkar, Prashant J. ...
JCC
2006
69views more  JCC 2006»
15 years 3 months ago
Dramatic performance enhancements for the FASTER optimization algorithm
: FASTER is a combinatorial optimization algorithm useful for finding low-energy side-chain configurations in side-chain placement and protein design calculations. We present two s...
Benjamin D. Allen, Stephen L. Mayo
TCAD
2008
81views more  TCAD 2008»
15 years 3 months ago
Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring
The relatively poor scaling of interconnect in modern digital circuits necessitates a number of design optimizations, which must typically be iterated several times to meet the spe...
Stephen Plaza, Igor L. Markov, Valeria Bertacco