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DSD
2005
IEEE
116views Hardware» more  DSD 2005»
14 years 1 months ago
Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip
The increasing amount of test data needed to test SOC (System-on-Chip) entails efficient design of the TAM (test access mechanism), which is used to transport test data inside the...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
ISCA
1995
IEEE
110views Hardware» more  ISCA 1995»
13 years 11 months ago
Optimization of Instruction Fetch Mechanisms for High Issue Rates
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
Thomas M. Conte, Kishore N. Menezes, Patrick M. Mi...
IJCNN
2007
IEEE
14 years 1 months ago
Analyzing the Fuzzy ARTMAP Matchtracking mechanism with Co-Objective Optimization Theory
— In the process of learning a pattern I, the Fuzzy ARTMAP algorithm templates (i.e., the weight vectors corresponding to nodes of its category representation layer) compete for ...
José Castro, Michael Georgiopoulos, Jimmy S...
DAC
2007
ACM
14 years 8 months ago
An Efficient Mechanism for Performance Optimization of Variable-Latency Designs
In many designs, the worst-case-delay path may never be exercised or may be exercised infrequently. For those designs, a strategy of optimizing a circuit for the worst-case condit...
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgo...
SIGECOM
2009
ACM
102views ECommerce» more  SIGECOM 2009»
14 years 2 months ago
An optimal lower bound for anonymous scheduling mechanisms
Itai Ashlagi, Shahar Dobzinski, Ron Lavi