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COMCOM
1999
122views more  COMCOM 1999»
13 years 9 months ago
An accurate performance model of shared buffer ATM switches under hot spot traffic
Asynchronous transfer mode (ATM) switches based on shared buffering are known to have better performance and buffer utilization than input or output queued switches. Shared buffer...
Mahmoud Saleh, Mohammed Atiquzzaman
TON
2010
83views more  TON 2010»
13 years 8 months ago
Understanding and modeling the internet topology: economics and evolution perspective
Abstract—In this paper, we seek to understand the intrinsic reasons for the well-known phenomenon of heavy-tailed degree in the Internet AS graph and argue that in contrast to tr...
Xiaoming Wang, Dmitri Loguinov
MSS
2003
IEEE
151views Hardware» more  MSS 2003»
14 years 3 months ago
Accurate Modeling of Cache Replacement Policies in a Data Grid
Caching techniques have been used to improve the performance gap of storage hierarchies in computing systems. In data intensive applications that access large data files over wid...
Ekow J. Otoo, Arie Shoshani
HPDC
2008
IEEE
14 years 4 months ago
Harmony: an execution model and runtime for heterogeneous many core systems
The emergence of heterogeneous many core architectures presents a unique opportunity for delivering order of magnitude performance increases to high performance applications by ma...
Gregory F. Diamos, Sudhakar Yalamanchili
DATE
2002
IEEE
137views Hardware» more  DATE 2002»
14 years 3 months ago
Practical Instruction Set Design and Compiler Retargetability Using Static Resource Models
The design of application (-domain) specific instructionset processors (ASIPs), optimized for code size, has traditionally been accompanied by the necessity to program assembly, ...
Qin Zhao, Bart Mesman, Twan Basten