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» Optimal clock synchronization in networks
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ICCD
1997
IEEE
158views Hardware» more  ICCD 1997»
13 years 11 months ago
Practical Advances in Asynchronous Design
Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems. This paper gives an overview of the current state of the art in practica...
Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun
EUROPAR
2003
Springer
14 years 28 days ago
On Transmission Scheduling in a Server-Less Video-on-Demand System
Recently, a server-less video-on-demand architecture has been proposed which can completely eliminate costly dedicated video servers and yet is highly scalable and reliable. Due to...
C. Y. Chan, Jack Y. B. Lee
DAC
2004
ACM
14 years 8 months ago
A method for correcting the functionality of a wire-pipelined circuit
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
Vidyasagar Nookala, Sachin S. Sapatnekar
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
14 years 1 months ago
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
Ankur Agiwal, Montek Singh
ICDE
2011
IEEE
244views Database» more  ICDE 2011»
12 years 11 months ago
Algorithms for local sensor synchronization
— In a wireless sensor network (WSN), each sensor monitors environmental parameters, and reports its readings to a base station, possibly through other nodes. A sensor works in c...
Lixing Wang, Yin Yang, Xin Miao, Dimitris Papadias...