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ISLPED
2009
ACM
184views Hardware» more  ISLPED 2009»
14 years 1 months ago
Online work maximization under a peak temperature constraint
Increasing power densities and the high cost of low thermal resistance packages and cooling solutions make it impractical to design processors for worst-case temperature scenarios...
Thidapat Chantem, Xiaobo Sharon Hu, Robert P. Dick
TCOM
2011
170views more  TCOM 2011»
13 years 2 months ago
On Girth Conditioning for Low-Density Parity-Check Codes
—Low-density parity-check (LDPC) codes are gaining interest for high data rate applications in both terrestrial and spatial communications. They can be designed and studied throu...
Samuele Bandi, Velio Tralli, Andrea Conti, Maddale...
ASPDAC
2009
ACM
159views Hardware» more  ASPDAC 2009»
14 years 1 days ago
Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors
— In three-dimensional (3D) chips, the amount of supply current per package pin is significantly more than in two-dimensional (2D) designs. Therefore, the power supply noise pro...
Pingqiang Zhou, Karthikk Sridharan, Sachin S. Sapa...
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
14 years 1 months ago
Thermal-induced leakage power optimization by redundant resource allocation
Traditionally, at early design stages, leakage power is associated with the number of transistors in a design. Hence, intuitively an implementation with minimum resource usage wou...
Min Ni, Seda Ogrenci Memik
EVOW
2000
Springer
13 years 11 months ago
Prediction of Power Requirements for High-Speed Circuits
Modern VLSI design methodologies and manufacturing technologies are making circuits increasingly fast. The quest for higher circuit performance and integration density stems from f...
Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Re...