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VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
14 years 10 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
14 years 6 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
EGH
2004
Springer
14 years 3 months ago
Mio: fast multipass partitioning via priority-based instruction scheduling
Real-time graphics hardware continues to offer improved resources for programmable vertex and fragment shaders. However, shader programmers continue to write shaders that require ...
Andrew Riffel, Aaron E. Lefohn, Kiril Vidimce, Mar...
TCBB
2011
13 years 4 months ago
Accurate Construction of Consensus Genetic Maps via Integer Linear Programming
—We study the problem of merging genetic maps, when the individual genetic maps are given as directed acyclic graphs. The computational problem is to build a consensus map, which...
Yonghui Wu, Timothy J. Close, Stefano Lonardi
BMCBI
2011
13 years 4 months ago
Screening synteny blocks in pairwise genome comparisons through integer programming
Background: It is difficult to accurately interpret chromosomal correspondences such as true orthology and paralogy due to significant divergence of genomes from a common ancestor...
Haibao Tang, Eric Lyons, Brent S. Pedersen, James ...