This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
Pohua P. Chang, William Y. Chen, Scott A. Mahlke, ...
In this paper, we propose a fully automatic dynamic scratchpad memory (SPM) management technique for instructions. Our technique loads required code segments into the SPM on deman...
Bernhard Egger, Chihun Kim, Choonki Jang, Yoonsung...
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
We combine mixed integer linear programming (MILP) and constraint programming (CP) to solve planning and scheduling problems. Tasks are allocated to facilities using MILP and sche...
We propose an Integer Programming (IP) framework to undertake the dedicated photolithography machine constraint in semiconductor manufacturing. The constraint is one of the new ch...
Huy Nguyen Anh Pham, Arthur M. D. Shr, Peter P. Ch...