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» Optimal instruction scheduling using integer programming
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GLVLSI
2003
IEEE
119views VLSI» more  GLVLSI 2003»
14 years 3 months ago
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
AI
2006
Springer
13 years 10 months ago
Constraint-based optimization and utility elicitation using the minimax decision criterion
In many situations, a set of hard constraints encodes the feasible configurations of some system or product over which multiple users have distinct preferences. However, making su...
Craig Boutilier, Relu Patrascu, Pascal Poupart, Da...
TPDS
2008
175views more  TPDS 2008»
13 years 10 months ago
Centralized versus Distributed Schedulers for Bag-of-Tasks Applications
Multiple applications that execute concurrently on heterogeneous platforms compete for CPU and network resources. In this paper, we consider the problem of scheduling applications ...
Olivier Beaumont, Larry Carter, Jeanne Ferrante, A...
MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
14 years 3 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
ICS
1999
Tsinghua U.
14 years 2 months ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey