378 search results - page 11 / 76 » Optimal integrated code generation for VLIW architectures |
ISSS
2002
IEEE
14 years 1 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
CP
2008
Springer
13 years 10 months ago
2008
Springer
Modern computer architectures have complex features that can only be fully taken advantage of if the compiler schedules the compiled code. A standard region of code for scheduling ...
CODES
2008
IEEE
13 years 8 months ago
2008
IEEE
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
DAC
1995
ACM
13 years 12 months ago
1995
ACM
—We address the problem of code optimization for embedded DSP microprocessors. Such processors (e.g., those in the TMS320 series) have highly irregular datapaths, and conventiona...
ASPLOS
1991
ACM
13 years 12 months ago
1991
ACM
Access/execute architectures have several advantages over more traditional architectures. Because address generation and memory access are decoupled from operand use, memory laten...