378 search results - page 21 / 76 » Optimal integrated code generation for VLIW architectures |
MAM
2006
13 years 8 months ago
2006
The increasingly complicated DSP processors and applications with strict timing and code size constraints require design automation tools to consider multiple optimizations such a...
ASPDAC
2004
ACM
14 years 1 months ago
2004
ACM
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
LCPC
2004
Springer
14 years 1 months ago
2004
Springer
Abstract. Branch predictors are associated with critical design issues for nowadays instruction greedy processors. We study two important domains where the optimization of decision...
IPPS
1999
IEEE
14 years 21 days ago
1999
IEEE
Abstract. The combination of a language with ne-grain implicit parallelism and a data
ow evaluation scheme is suitable for high-level programming on massively parallel architectur...
CGO
2004
IEEE
14 years 5 days ago
2004
IEEE
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to the outer loops. In a companion paper, we proposed a ...