Sciweavers

378 search results - page 35 / 76
» Optimal integrated code generation for VLIW architectures
Sort
View
IPPS
2009
IEEE
14 years 3 months ago
Annotation-based empirical performance tuning using Orio
In many scientific applications, significant time is spent tuning codes for a particular highperformance architecture. Tuning approaches range from the relatively nonintrusive (...
Albert Hartono, Boyana Norris, Ponnuswamy Sadayapp...
RSP
2003
IEEE
169views Control Systems» more  RSP 2003»
14 years 1 months ago
Rapid Prototyping and Incremental Evolution Using SLAM
The paper shows the outlines of the SLAM system and how its design is suitable for automating rapid prototyping. The system includes a very expressive object oriented specificati...
Ángel Herranz-Nieva, Juan José Moren...
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 2 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
PLDI
1995
ACM
13 years 12 months ago
Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
Jack L. Lo, Susan J. Eggers
SIGMOD
2000
ACM
141views Database» more  SIGMOD 2000»
14 years 24 days ago
Counting, Enumerating, and Sampling of Execution Plans in a Cost-Based Query Optimizer
Testing an SQL database system by running large sets of deterministic or stochastic SQL statements is common practice in commercial database development. However, code defects oft...
Florian Waas, César A. Galindo-Legaria