378 search results - page 54 / 76 » Optimal integrated code generation for VLIW architectures |
VEE
2005
ACM
14 years 28 days ago
2005
ACM
We present an optimized implementation of the linear scan register allocation algorithm for Sun Microsystems’ Java HotSpotTM client compiler. Linear scan register allocation is ...
ISCAS
2003
IEEE
14 years 20 days ago
2003
IEEE
Couple to the communications wired and unwired networks growth, is the increasing demand for strong secure data transmission. New cryptographic standards are developed, and new en...
PPOPP
2009
ACM
14 years 8 months ago
2009
ACM
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
FPGA
2003
ACM
14 years 18 days ago
2003
ACM
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...