378 search results - page 6 / 76 » Optimal integrated code generation for VLIW architectures |
HIPEAC
2007
Springer
13 years 11 months ago
2007
Springer
In this paper, we examine the trade-offs in performance and area due to customizing the datapath and instruction set architecture of a soft VLIW processor implemented in a high-den...
ASPLOS
1989
ACM
13 years 11 months ago
1989
ACM
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
CODES
2009
IEEE
13 years 11 months ago
2009
IEEE
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...