378 search results - page 9 / 76 » Optimal integrated code generation for VLIW architectures |
MODELLIERUNG
2008
13 years 9 months ago
2008
Abstract: Model transformation is not only a crucial but also one of the most complicated aspects of model-driven software development (MDSD). An adequate transformation language i...
FPL
2009
Springer
14 years 1 months ago
2009
Springer
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a new operation chaining reconfigurable scheduling algorithm (CRS) based on list scheduling that maximizes instruction level parallelism available in distribut...
DAC
1996
ACM
14 years 16 days ago
1996
ACM
In this paper, we outline general design steps of our synthesis tool to realize application specific co-processors such that for a given scientific application having intensive ite...
VLSISP
2008
13 years 8 months ago
2008
Many different video processor architectures exist. Its architecture gives a processor strength for a particular application. Hardwired logic yields the best performance/cost, but ...