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INFOCOM
2008
IEEE
14 years 5 months ago
Distributed Operator Placement and Data Caching in Large-Scale Sensor Networks
Abstract—Recent advances in computer technology and wireless communications have enabled the emergence of stream-based sensor networks. In such sensor networks, real-time data ar...
Lei Ying, Zhen Liu, Donald F. Towsley, Cathy H. Xi...
RTSS
2006
IEEE
14 years 4 months ago
Tightening the Bounds on Feasible Preemption Points
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
ICS
1999
Tsinghua U.
14 years 3 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
ISSS
1996
IEEE
123views Hardware» more  ISSS 1996»
14 years 3 months ago
Memory Organization for Improved Data Cache Performance in Embedded Processors
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
FPL
2006
Springer
137views Hardware» more  FPL 2006»
14 years 2 months ago
FPGA Performance Optimization Via Chipwise Placement Considering Process Variations
Both custom IC and FPGA designs in the nanometer regime suffer from process variations. But different from custom ICs, FPGAs' programmability offers a unique design freedom t...
Lerong Cheng, Jinjun Xiong, Lei He, Mike Hutton