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IEEECGIV
2005
IEEE
14 years 1 months ago
A Practical Implementation of a 3-D Game Engine
Creating a 3-D game engine is not a trivial task as gamers often demand for high quality output with top notch performance in games. In this paper, we show you how various real-ti...
Thomas C. S. Cheah, Kok-Why Ng
GECCO
2009
Springer
157views Optimization» more  GECCO 2009»
14 years 2 months ago
Multi material topological optimization of structures and mechanisms
Multi-material 3D-printing technologies permit the freeform fabrication of complex spatial arrangements of materials in arbitrary geometries. This technology has opened the door t...
Jonathan D. Hiller, Hod Lipson
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
14 years 2 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
ASPDAC
2007
ACM
87views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Topology exploration for energy efficient intra-tile communication
With technology nodes scaling down, the energy consumed by the on-chip intra-tile interconnects is beginning to have a significant impact on the total chip energy. The Energyoptima...
Jin Guo, Antonis Papanikolaou, Francky Catthoor
GECCO
2006
Springer
158views Optimization» more  GECCO 2006»
13 years 11 months ago
Exploring network topology evolution through evolutionary computations
We present an evolutionary methodology that explores the evolution of network topology when a uniform growth of the network traffic is considered. The network redesign problem is ...
Sami J. Habib, Alice C. Parker