158 search results - page 1 / 32 » Optimality and Stability Study of Timing-Driven Placement Al... |
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
This work studies the optimality and stability of timing-driven placement algorithms. The contributions of this work include two parts: 1) We develop an algorithm for generating s...
TCAD
2008
13 years 7 months ago
2008
Physical synthesis tools are responsible for achieving timing closure. Starting with 130nm designs, multiple cycles are required to cross the chip, making latch placement critical...
ISPD
2003
ACM
14 years 7 days ago
2003
ACM
This paper studies the optimality, scalability and stability of stateof-the-art partitioning and placement algorithms. We present algorithms to construct two classes of benchmarks...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
ISPD
2003
ACM
14 years 7 days ago
2003
ACM
This paper presents a new timing driven force directed placement algorithm that meets physical net length constraints as well as constraints on specific pin sets. It is the first ...