The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
We present an equation-based transistor size optimizer that minimizes delay of custom circuits. Our method uses static timing analysis to find the critical paths and numerical met...
Xiao Yan Yu, Vojin G. Oklobdzija, William W. Walke...
Virtual prototyping and numerical simulations are increasingly replacing real mock-ups and experiments in industrial product development. Many of these simulations, e.g. for the p...
— In order to optimize the costs and time of design of the new products while improving their quality, concurrent engineering is based on the digital model of these products, the...
This paper presents an efficient method for optimizing power/ground (P/G) networks by widening wires and adding decoupling capacitors (decaps). It proposes a structured skeleton t...