Sciweavers

40 search results - page 6 / 8
» Optimization of Instruction Fetch for Decision Support Workl...
Sort
View
MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
14 years 28 days ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
ISCA
2006
IEEE
138views Hardware» more  ISCA 2006»
14 years 1 months ago
Learning-Based SMT Processor Resource Distribution via Hill-Climbing
The key to high performance in Simultaneous Multithreaded (SMT) processors lies in optimizing the distribution of shared resources to active threads. Existing resource distributio...
Seungryul Choi, Donald Yeung
ICDE
1999
IEEE
101views Database» more  ICDE 1999»
14 years 8 months ago
Index Merging
Indexes play a vital role in decision support systems by reducing the cost of answering complex queries. A popular methodology for choosing indexes that is adopted by database adm...
Surajit Chaudhuri, Vivek R. Narasayya
ASPLOS
2004
ACM
14 years 24 days ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...
DAWAK
2005
Springer
14 years 27 days ago
DWEB: A Data Warehouse Engineering Benchmark
Abstract. Data warehouse architectural choices and optimization techniques are critical to decision support query performance. To facilitate these choices, the performance of the d...
Jérôme Darmont, Omar Boussaid, Fadila...