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» Optimization of in-network data reduction
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ASPDAC
2009
ACM
141views Hardware» more  ASPDAC 2009»
14 years 1 months ago
Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures
Abstract-- The increasing wire delay constraints in deep submicron VLSI designs have led to the emergence of scalable and modular Network-on-Chip (NoC) architectures. As the power ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri...
IPPS
2007
IEEE
14 years 4 months ago
A global address space framework for locality aware scheduling of block-sparse computations
In this paper, we present a mechanism for automatic management of the memory hierarchy, including secondary storage, in the context of a global address space parallel programming ...
Sriram Krishnamoorthy, Ümit V. Çataly&...
ECML
2005
Springer
14 years 3 months ago
Severe Class Imbalance: Why Better Algorithms Aren't the Answer
This paper argues that severe class imbalance is not just an interesting technical challenge that improved learning algorithms will address, it is much more serious. To be useful, ...
Chris Drummond, Robert C. Holte
CVPR
2011
IEEE
13 years 6 months ago
Enforcing Similarity Constraints with Integer Programming for Better Scene Text Recognition
The recognition of text in everyday scenes is made difficult by viewing conditions, unusual fonts, and lack of linguistic context. Most methods integrate a priori appearance info...
David Smith, Jacqueline Feild, Eric Learned-Miller
NIPS
2001
13 years 11 months ago
Laplacian Eigenmaps and Spectral Techniques for Embedding and Clustering
Drawing on the correspondence between the graph Laplacian, the Laplace-Beltrami operator on a manifold, and the connections to the heat equation, we propose a geometrically motiva...
Mikhail Belkin, Partha Niyogi