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    FPGA
    1998
    ACM
    148views FPGA» more  FPGA 1998»
    Optimizations for a Highly Cost-Efficient Programmable Logic Architecture
    14 years 3 months ago
    Optimizations for a Highly Cost-Efficient Programmable Logic Architecture
    Download  www.cs.york.ac.uk
    Kerry Veenstra, Bruce Pedersen, Jay Schleicher, Ch...
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    IADIS
    2009
    198views Internet Technology» more  IADIS 2009»
    A strategy for cost efficient distributed data storage for in-memory OLAP
    13 years 8 months ago
    A strategy for cost efficient distributed data storage for in-memory OLAP
    Download  www.andyross.net
    With the availability of inexpensive blade servers featuring 32 GB or more of main memory, memory-based engines such as the SAP NetWeaver Business Warehouse Accelerator are coming...
    Olga Mordvinova, Oleksandr Shepil, Thomas Ludwig 0...
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    FPGA
    2005
    ACM
    156views FPGA» more  FPGA 2005»
    Design of programmable interconnect for sublithographic programmable logic arrays
    14 years 4 months ago
    Design of programmable interconnect for sublithographic programmable logic arrays
    Download  ic.ese.upenn.edu
    Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...
    André DeHon
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    ASAP
    2004
    IEEE
    126views Hardware» more  ASAP 2004»
    Hyper-Programmable Architectures for Adaptable Networked Systems
    14 years 2 months ago
    Hyper-Programmable Architectures for Adaptable Networked Systems
    Download  www.kandeco.com
    We explain how modern programmable logic devices have capabilities that are well suited for them to assume a central role in the implementation of networked systems, now and in th...
    Gordon J. Brebner, Philip James-Roxby, Eric Keller...
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    FPGA
    2006
    ACM
    141views FPGA» more  FPGA 2006»
    A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
    14 years 2 months ago
    A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
    Download  pavel.physics.sunysb.edu
    This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
    Dmitri B. Strukov, Konstantin Likharev
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