155 search results - page 24 / 31 » Optimizations for a Highly Cost-Efficient Programmable Logic... |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
CATA
2003
13 years 8 months ago
2003
Many current general purpose processors use extensions to the instruction set architecture to enhance the performance of digital image processing and multimedia applications. In t...
DAC
2012
ACM
11 years 9 months ago
2012
ACM
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
CASES
2003
ACM
14 years 18 days ago
2003
ACM
CRYPTONITE is a programmable processor tailored to the needs of crypto algorithms. The design of CRYPTONITE was based on an in-depth application analysis in which standard crypto ...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...