155 search results - page 9 / 31 » Optimizations for a Highly Cost-Efficient Programmable Logic... |
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper we discuss our initial experiences adapting OpenMP to enable it to serve as a programming model for high performance embedded systems. A high-level programming model...
FCCM
1999
IEEE
13 years 11 months ago
1999
IEEE
We have implemented an image combining architecture that allows distributed rendering of a partitioned data set at interactive rates. The architecture achieves real-time frame rat...
ARITH
2009
IEEE
14 years 2 months ago
2009
IEEE
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open and largely unsolved problem, espec...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
ARC
2010
Springer
13 years 7 months ago
2010
Springer
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...