Challenges in Automatic Optimization of Arithmetic Circuits

Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open and largely unsolved problem, especially for arithmetic circuits. In many cases, the outcome of even the most advanced synthesis techniques is highly dependent on the input description of the circuit, and the optimizations themselves barely modify the architecture of the circuit itself. Once the input description is converted to an appropriate architecture, logic synthesis performs local optimizations quite effectively; however, finding the best architecture up front is a nontrivial problem. This paper reviews recent results in arithmetic logic synthesis that the authors have published in recent years. Progress has clearly been made, but much further work is still needed to narrow the gap between the effectiveness of logic synthesis techniques for arithmetic and control-oriented circuits.

• Type: Conference
• Year: 2009
• Where: ARITH
• Authors: Ajay K. Verma, Philip Brisk, Paolo Ienne
• Keywords: Applied Computing, ARITH 2009, Input Description, Logic Synthesis, Synthesis Techniques