Sciweavers

52 search results - page 10 / 11
» Optimized Timed Hardware Software Cosimulation without Roll-...
Sort
View
IEEEPACT
2006
IEEE
14 years 2 months ago
Compiling for stream processing
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
Abhishek Das, William J. Dally, Peter R. Mattson
ISPD
2006
ACM
175views Hardware» more  ISPD 2006»
14 years 2 months ago
mPL6: enhanced multilevel mixed-size placement
The multilevel placement package mPL6 combines improved implementations of the global placer mPL5 (ISPD05) and the XDP legalizer and detailed placer (ASPDAC06). It consistently pr...
Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kent...
PLDI
2004
ACM
14 years 1 months ago
Symbolic pointer analysis revisited
Pointer analysis is a critical problem in optimizing compiler, parallelizing compiler, software engineering and most recently, hardware synthesis. While recent efforts have sugges...
Jianwen Zhu, Silvian Calman
ICCAD
2003
IEEE
141views Hardware» more  ICCAD 2003»
14 years 1 months ago
An Enhanced Multilevel Algorithm for Circuit Placement
This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation...
Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shin...
VEE
2009
ACM
146views Virtualization» more  VEE 2009»
14 years 3 months ago
Demystifying magic: high-level low-level programming
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
Daniel Frampton, Stephen M. Blackburn, Perry Cheng...