52 search results - page 8 / 11 » Optimized Timed Hardware Software Cosimulation without Roll-... |
DAC
2007
ACM
14 years 1 months ago
2007
ACM
While cryptographic algorithms are usually strong against mathematical attacks, their practical implementation, both in software and in hardware, opens the door to side-channel at...
LCTRTS
1999
Springer
14 years 2 months ago
1999
Springer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
ISCA
2011
IEEE
13 years 1 months ago
2011
IEEE
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
CASES
2005
ACM
13 years 11 months ago
2005
ACM
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
DSD
2010
IEEE
13 years 10 months ago
2010
IEEE
—Current general-purpose memory allocators do not provide sufficient speed or flexibility for modern highperformance applications. To optimize metrics like performance, memory us...