1251 search results - page 70 / 251 » Optimizing Compilation of CLP(R) |
147
Voted
RTCSA
2006
IEEE
15 years 10 months ago
2006
IEEE
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
140
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ICPPW
2005
IEEE
15 years 10 months ago
2005
IEEE
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
142
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CGO
2007
IEEE
15 years 8 months ago
2007
IEEE
Dynamic predication has been proposed to reduce the branch misprediction penalty due to hard-to-predict branch instructions. A recently proposed dynamic predication architecture, ...
149
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CP
2007
Springer
15 years 11 months ago
2007
Springer
Searching for optimal solutions to a problem using lower bounds obtained from a relaxation is a common idea in Heuristic Search and Planning. In SAT and CSPs, however, explicit rel...
162
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PPOPP
2005
ACM
15 years 10 months ago
2005
ACM
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...