3206 search results - page 25 / 642 » Optimizing Graph Algorithms for Improved Cache Performance |
TVLSI
2010
13 years 3 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
ICDCS
2008
IEEE
14 years 3 months ago
2008
IEEE
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...
PDPTA
2007
13 years 10 months ago
2007
As web engineering evolves web based applications complexity grows in higher orders of magnitude. Is not uncommon to find in today web based applications complex and time consumin...
ISPASS
2010
IEEE
14 years 3 months ago
2010
IEEE
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
ISCA
2007
IEEE
14 years 3 months ago
2007
IEEE
The commonly used LRU replacement policy is susceptible to thrashing for memory-intensive workloads that have a working set greater than the available cache size. For such applica...