1276 search results - page 8 / 256 » Optimizing Hierarchical Schedules for Improved Control Perfo... |
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
In a chip-multiprocessor (CMP) system, the DRAM system is shared among cores. In a shared DRAM system, requests from a thread can not only delay requests from other threads by cau...
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
Effective use of communication networks is critical to the performance and scalability of parallel applications. Partitioned Global Address Space languages like UPC bring the pro...
EUROMICRO
1998
IEEE
13 years 11 months ago
1998
IEEE
The paper presents an approach to process scheduling for embedded systems. Target architectures consist of several processors and ASICs connected by shared busses. We have develop...
NETWORKING
2008
13 years 8 months ago
2008
Caching popular content in the Internet has been recognized as one of the effective solution to alleviate network congestion and accelerate user information access. Sharing and coo...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
We present a CPU scheduling algorithm, called Energy-efficient Utility Accrual Algorithm (or EUA), for battery-powered, embedded real-time systems. We consider an embedded softwar...